Daniel Bois, France Telecom: "The 80's - 90's microelectronic logbook and guidelines for navigating off the beaten path"
The purpose of this presentation will be to analyse some of the key developments and predictions of the last decades, and try to deduce from them guidelines for long term R/D.
The economical development of the silicon technologies is nowadays in competition with the progress of the electronic industry because of the pervasion phenomena. Therefore within the next decade, new business models and R/D financing scheme must be found to pursue the exponential progress of integration.
The acceleration of the miniaturisation, which has been observed during the 90's, can be explained by the successful introduction in production of a limited number of very simple and crude technical innovations, and by the strong demand of the market. This market has been driven by the merge of computers and telecommunications. For the future, there is a large field for new application developments, but increasing R/D efforts must be devoted to the applications in order to strongly enhance the silicon consumption per person.
The « interconnect crisis » and its impact on the power dissipation is certainly the key technical challenge for the next decade. It has been recognised for long as critical and it remains so, despite the introduction of key innovations such as Chemical-Mechanical-Polishing, copper, or low K dielectric. It will increase dramatically the constraints over circuit design and architecture.
New architectures, and even more new paradigms for memorising the information, or fabricating complex devices could revolutionise the information technologies but the time has not come to underestimate the capability of the Silicon technology.
Chang-Guy Hwang, Samsung: "Driving Forces of Future Semiconductor Technology"
Since the industry's first semiconductor chip, semiconductor logic and memory chips have achieved dramatic growth and development in performance and density fueled by rapid technology advances. This presentation briefly reviews the technology barriers in several key processes that industry will face in production in the next decade.
To overcome the physical limits we need technology breakthroughs which substantially reduces development cost. However, the price per transistor has declined at the rate of 21% per year on the average and even in last five years it was more than 35% per year. While we are making great efforts on new concept technology development under price crisis, the industry should concentrate on low cost technology to continue the semiconductor business and even to survive from the competition.
Finally, some examples of industry's efforts to get over both technological and economical difficulties such as adopting large wafer, utilizing existing technologies and high value-added chip line-up, and Samsung's first in the world commercial 256M DRAM with 0.18um design rule on 200mm wafer are introduced.
Armin Wieder, Siemens: "Paradigm shifts in processing, circuits, systems and HW/SW solutions"
There is only one way to professionally speculate about the long term perspectives of microelectronics "off the beaten path" and that is profoundly knowing about the "beaten path". Therefore after the very briefly outlining the most likely mainstream development I will try to define the validity range of conventional thinking in the different disciplines like materials, processing, devices, circuits, systems & algorithms & architectures, packaging, CAx, test, manufacturing and applications. This is specifically difficult and "dangerous" because there are no fundamental limits to encounter for the next 25 to 30 years; except the ones we are already fighting since the beginning of microelectronics.
However, there are various limitations like material, technological, device dependant, architectural, complexity dependant and last not least economical limitations. Taking that into consideration I will try to predict the range of conventional thinking for the various disciplines mentioned before. I will also try in vision what will be reality in the far future like year 2020 and 2025 for the same disciplines. Therefore for the discussion we have the exploratory approach starting from today into the future as well as the strategic visioning approach retrapolating back from the future.
I hope it will be fun to discuss the argumentation, the consequences and the possible contradictions in our workshop, and I hope we develop some common feeling on one or the other item.
Trey Smith, Compaq: "Ubiquitous Computing"
The computer industry has seen progress rivaled only by the steam engine and the electric motor. From large centralized mainframes to embedded processors integrated in consumer electronic devices, computers are literally everywhere. This proliferation has fueled a technological and economic boom reminiscent of industrialization at the beginning of the 20th Century. The implications and opportunities are similarly profound. We will examine three fundamental trends that will drive continued opportunity, innovation and economic growth: consolidation, commiditization, and at long last, convergence.
Consolidation has it roots the continued drive for integration. As industry leaders develop systems-on-a-chip and create standards for these systems and their operating systems we will find once again that only a few leaders will flourish and drive growth. However, the winners may not necessarily be the ones we are familiar with. This next round of consolidation will require new skills since the basic instructions for systems that integrate computing, communications and I/O are very different than those required for traditional stand-alone computing.
Mass commoditization will follow closely on the heels of universal or defacto standards. At the system level we will see the barriers to entry drop as technologies become more robust and can be integrated more easily. Jumping from the cash register to the local vending machine, moving from the PC to the VCR, commodity computing will be integrated and exploited everywhere.
Finally, we will examine the subtle but pervasive emergence of digital convergence. Infrared, wireless, satellite, broadcast, compression and correlation technologies will transform information, entertainment and communications into bits that benefit from the efficiencies and speed of a global electronic village.
Hisatsune Watanabe, NEC: "Driving factors and breakthroughs for higher performance semiconductors"
The world wide semiconductor market has grown up to about 150B$ in 1997 (3.5% is III-V sales) with a growth rate of 17% per year (Si and III-V have a nearly equal growth rate.) Device performance of Si LSI has become higher with increasing the number of integrated devices, the freedom of interconnection complexity and the variation of installed software.The performance increase has clearly reflected to chip size growth ( reaching 700 mm2). Major LSI such as DRAM and MPU have been called technology driver, because they drive main breakthroughs in the total LSI technology. SOC (System On a Chip integrated with MPU, DSP, DRAM, SRAM and other function LSIs) is expected to become a next major player.
However, the crisis is recently pointed out for the integration engineering such as lithography for 0.1 micron process, multilayer interconnection, power dissipation, design TAT, production cost and so on. Breakthroughs expected to overcome these crisis will be discussed. III-V devices have increased their performances, without chip size growth ( remained in 0.1-4 mm2 ),by improving individual device characteristics such as operating frequency/wavelength, efficiency and linearity of amplifiers, noise figure, and so on.They were achieved by breakthroughs based on the band engineering with introducing sophisticated energy band structures or superlattices. Understanding and synthesizing of application-specific energy band structures are crucial for any kind of advanced III-V devices. Individual III-V technologies frequently jumped up by personal or small group contributions. MBE, MOCVD, superlattice, DH-LD, HEMT and GaN are good examples, all of which let us imagine researcher's names and recognize their personal reputations in science. Highly advanced III-V people are entering to the wavefunction engineering where they try to shape and interconnect wavefunctions artificially in nano-structured confinements. Si is contributing to breakthrough directly in technology along the beaten path, while III-V is contributing to breakthrough at first in science looking for off-the-beaten-path. This may be the difference of sales.
Herb Goronkin, Motorola: "The slow demise of conventional integrated circuits (is there life after MOSFETs?)"
The "Beaten Path" is littered with the detritus of obsolete integrated circuit technologies. Bulk MOSFET ICs, bipolar ICs, EEPROMs. The process complexity involved in scaling MOSFETs is increasingly expensive. Improvements in speed and power are balanced by trade-offs in cell size. Transistor drive capability is diminished by the inability to scale gate oxide thickness with gate length. The number of electrons in highly scaled CMOS is less than 100 for 64Mb DRAM pass transistors. Fluctuations in electron density will soon need to be taken into account in designing ICs with smaller noise margins. Alternative technologies such as compound semiconductors do not offer much promise when cost and ultimate performance are compared with silicon. New approaches such as quantum functional devices that are based on tunneling have been suggested. So far, III-V tunnel structures have high valley current which prohibits their use in dense ICs. Silicon tunnel diodes have many orders of magnitude lower tunnel current density and cannot drive subsequent circuits.
For memories, scaling the storage element is a major challenge. GMR offers a way to scale memories well beyond the Gb range by using multiple storage elements per transistor.
There are numerous creative approaches to structures for single electron devices and to architectures for using these devices. It is in this area that the challenges for application are significant. So far, the inability of a SET to drive another SET has been addressed by architectures that use several SETs in order to obtain logic functions. None of these have successfully operated at room temperature. Several groups are exploring self assembly, either using organic or crystalline materials, to achieve structures that cannot be achieved using lithography alone. Some of the challenges associated with these approaches will be addressed in this talk.
