Bryand and O'Hallaron
                             Chapter 3 Section 4.1
                               Operand Specifiers


IA-32 (Intel Architecture 32-bit) General Registers


        <-------------------- 32-bit %e-x registers ------------------->
                                        <---- 16-bit %-x registers ---->
                                        <- 8-bit reg -> <- 8-bit reg ->  

 32-bit                                                                 16-bit
  Regs                                                                   regs
       +-------------------------------+---------------+---------------+
 %eax  |                               |      %ah      |      %al      |  %ax
       +-------------------------------+---------------+---------------+
 %ebx  |                               |      %bh      |      %bl      |  %bx 
       +-------------------------------+---------------+---------------+
 %ecx  |                               |      %ch      |      %cl      |  %cx
       |-------------------------------+---------------+---------------+
 %edx  |                               |      %dh      |      %dl      |  %dx
       +-------------------------------+---------------+---------------+
 %esp  |                               |                               |  %sp 
       +---------------------------------------------------------------+     
 %ebp  |                               |                               |  %bp
       +---------------------------------------------------------------+     
 %esi  |                               |                               |  %si 
       +---------------------------------------------------------------+     
 %edi  |                               |                               |  %di 
       +---------------------------------------------------------------+     

       +---------------------------------------------------------------+     
  eip  |                               |                               |  ip 
       +---------------------------------------------------------------+     


The following instructions show how the %al, %ah, %ax, and %eax (Extended ax
register) can be accessed by an assembly language program.

        clrb    %al    # clear bits 0 to 7, remaining 24 bits unchanged
        clrb    %ah    # clear bits 8 to 15, remaining 24 bits unchanged 
        clrw    %ax    # clear bits 0 to 15, remaining 16 bits unchanged  
        clrl    %eax   # clear bits 0 to 31


Operand Specifiers

1. Immediate - The operand is "inside the instruction". Used for constant 
   values. Examples $-155, %0x1f. Any value that fits in a 32-bit word. 
   Occupies 1, 2, or 4 bytes in the instruction.
   
2. Register - The operand in in an 1, 2, 4, 8, or 16 byte (8, 16, 32, 64,
   or 128-bit) register. Examples %al, %bh, %cx, %edx. 
   
3. Memory reference - The operand is in memory. There are a variety of
   ways (modes) to computer the memory address (which is called the 
   affective address).  The scaling factor s must be either 1, 2, 4, or 8.


Type        Form               Operand value               Name

Immediate   $Imm               Imm                          Immediate
Register    %rx                R[%rx]                       Register
Memory      Imm                M[Imm]                       Absolute  
Memory      (%rx)              M[R[%rx]]                    Indirect  
Memory      Imm(%rx)           M[Imm + R[%rx]]              Base+displacement 
Memory      (%rx, %ry)         M[R[%rx] + R[%ry]]           Indexed  
Memory      Imm(%rx, %ry)      M[Imm + R[%rx] + R[%ry]]     Indexed  
Memory      (, %ry, s)         M[R[%ry]*s]                  Scaled index  
Memory      Imm(%ry, s)        M[Imm + R[%ry]*s]            Scaled index  
Memory      (%rx, %ry, s)      M[R[%rx] + R[%ry]*s]         Scaled index  
Memory      Imm(%rx, %ry, s)   M[Imm + R[%rx] + R[%ry]*s]   Scaled index  


See practice problem 3.1 on page 138.