Applications based on signal processing and related areas (such as communications, multimedia processing, and scientific computing) are crucial components of modern computing, appearing in every type of environment from embedded systems to supercomputers. Their performance and energy efficiency are critically important, making hardware implementation (ASIC or FPGA) attractive, but the difficulty and expense of hardware design often raises a significant barrier to adoption.
My research addresses these problems by combining my interests in hardware, digital signal processing, compilers, and computer-aided design of digital systems. My goal is to use domain-specific knowledge to construct automated hardware generation tools for digital signal processing and related domains, formally capturing an application’s algorithmic and datapath freedoms to enable automatic exploration and implementation.
My thesis focused on automatic hardware generation of FPGA and ASIC cores for the domain of linear signal transforms (most importantly, the fast Fourier transform or FFT). In it I proposed the Spiral hardware generation framework, a hardware compilation and optimization tool that uses a mathematical formula language to represent transform algorithms and sequential hardware structures. By formally connecting structure within an algorithm with microarchitectural freedoms, the tool is able to symbolically manipulate algorithms and datapaths in order to best match desired cost/performance characteristics. See also this overview paper.
The resulting system produces high quality designs over a very wide tradeoff space, allowing the user to choose the design that best matches his or her implementation- specific tradeoff goals, balancing cost (power, energy, area) against performance (throughput, latency). The system is able to produce cores that compare well with existing designs in the literature or in IP libraries and enables higher performance/cost design points than otherwise available.
For a list of publications, please follow the link to your left.