ESE 566:
Hardware/Software Co-Design
of Embedded Systems
(Graduate course)
 
 
 

Instructor: Alex Doboli, PhD

Credits: 3 credits

Description:

This course will present state-of-the-art concepts and techniques for design of embedded systems consisting of hardware  and software components. Discussed topics include system specification, architectures for embedded systems, performance  modeling and evaluation, system synthesis and validation. The course is complemented by three mini-projects focused on  designing and implementing various co-design methods.

Goal:

Upon completion of this course, students will possess knowledge on state-of-the-art methodologies and techniques for hardware/software co-design of embedded systems. They will be able to (1) develop system-level specifications using popular languages i.e. VHDL or C, (2) implement algorithms for punctual co-design tasks and (3) integrate developed algorithms into an overall co-design framework.

 

Topics:
   

Introduction to Co-Design

Problem description, goals of co-design, co-design steps, co-design approaches and accomplishments, challenges.

Architectures for Embedded Systems

a) Single processor û coprocessor architecture, multiprocessor architectures, core (IP) based design, reconfigurable systems, platform-based design. 
b) Interfacing embedded systems to the external environment: sensors. (tentative) 

PSoC reconfigurable mixed-signal SoC.

System Modeling and Specification 

a) Models of Computation (Finite State Machines, Extended Finite State Machines, Control/Data Flow Nets, Petri nets, Task graphs, hierarchical models). 
b) System Specification Languages.

Performance Modeling

a) System-level performance modeling vs. low-level performance modeling.
b) Modeling of execution speed (system latency) and energy consumption for hardware and software. Estimation of memory requirements. 

System-Level Synthesis

a) Architecture selection.
b) Hardware/software partitioning. Task scheduling (scheduling under data and control dependencies, static and dynamic scheduling, heuristic and exact scheduling algorithms).

Communication synthesis

a) Hardware and software interface synthesis.
b) Bus encoding for low power consumption.

Hardware synthesis

High-level synthesis: behavioral specification of hardware, module set allocation, resource binding, operation scheduling, controller synthesis.

Software synthesis

Embedded software design. Software generation under memory and energy consumption minimization constraints. 

Verification of hardware/software systems

a) Hardware/Software co-simulation.
b) Formal Verification.

 

Class Projects:

Three course projects complement the material discussed in class. The goal of the projects is to familiarize students with system architectures, specification, and system design using modern reconfigurable SoC.  

Text Books and other Materials

No textbook is required. Published papers will be provided in class.

Other Related Material:

·         Jerraya, J. Mermet, "System Level Synthesis", Kluwer, 1999.

·         G. De Micheli, "Synthesis and Optimization of Digital Circuits", McGraw-Hill, 1994.

Grading

        Final grade =  0.3 x Project 1 + 0.3 x Project 2 + 0.4 x Project 3